RESUME

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WORK EXPERIENCE

Senior Software Engineer

Odeko Inc

2022-2023

 

  • First engineer at the money pod team. Built internal tools for foundational features related to company-wide pricing data sharing management, accounting, and item promotions tools in an event-driven microservices architecture. Engaged in full-stack development using React and Ruby on Rails in combination with Postgres, GraphQL, and Kafka.
  • Participated in a complex re-architecture project that involved breaking down a large monolith into multiple microservices.
  • Implemented a promotion engine using NetSuite and Voucherify API.
  • Dynamically adjusted priorities and timetables to meet the company’s fast-paced environment.
  • Defined potential strategies and goals for several money-related projects and alternative revenue streams.
  • Skills: Ruby on Rails, Node.js, React, Postgres, Apache Kafka, GraphQL

Co-founder Software Engineer

Academig Inc

2017-2021

  • Developed an all-in-one search platform for research labs using Angular, Node.js, Express.js, and MongoDB.
  • Developed an admin management system and optimized the user onboarding flow for CAC.
  • Led and managed a team of 5 part-time contractors, overseeing the platform’s growth from 0 to 10K users.
  • Conducted user interviews, designed wireframe prototypes, and implemented over ten iterations of the MVP.
  • Implemented Angular SSR for improved performance and efficient web crawling.
  • Implemented authentication and authorization using Auth0.
  • Implemented a research labs search engine using the Algolia Elastic Search API, a chat functionality using the PusherIO API and webhooks, a news feed and real-time notifications using the StreamIO API, and payment options using the Stripe API.
  • Participated in the 2019 cohort of the Start Accelerator program in Switzerland.
  • Skills: Node.js, Express.js, Angular, MongoDB, Heroku, Auth0, Stripe

Visiting Scientist

Prof. Michael Thoss’s group

University of Erlangen-Nuremberg

2016-2017

  • My work at the university was a continuation of the projects established at the Technion (below).

Research assistant

Prof. Uri Peskin’s group

Technion - Israel Institute of Technology

2015-2016

  • Characterized two novel quantum memory device architectures.
  • Authored two publications.
  • Mentored three graduate students.

Graduate research assistant (Ph.D.)

Prof. Uri Peskin’s and Prof. Efrat Lifshitz’s groups

Technion - Israel Institute of Technology

2011-2015

Thesis: ‘Modeling charge transport induced phenomena in colloidal double quantum dots and developing new probes for inter-dot interactions.’ Download PDF

  • Developed novel open quantum systems models involving electronic and mechanical properties of double low-dimensional semiconductor crystals using the Quantum Master Equation algorithm.
  • Conducted both theoretical and experimental studies. Organized the collaboration team responsible for synthesizing and characterizing a novel measurement setup of inter-quantum-dot interactions using Scanning Tunneling Microscopy (STM).
  • Mentored two graduate students.
  • Authored four publications as the first author.
  • Skills: MATLAB, Python, STM

Graduate research assistant (M.Sc.)

Prof. Yossi Rosenwaks’s group

Tel Aviv University

2009-2011

Thesis: ‘Vertical Junction Silicon Cells for Concentrating Photovoltaics.’ Download PDF

  • Simulated a previously unexplored vertical solar cell configuration for high-concentration PV systems.
  • Designed masks and fabricated a prototype in collaboration with Tower Semiconductor
  • Characterized the solar cell prototype using Atomic Force Microscopy (AFM), Scanning Electron Microscopy (SEM) and tested efficiency at a high light concentration test facility setup.
  • Serving as a teaching assistant for the VLSI course and an electrical engineering lab instructor.
  • Skills: MATLAB, TCAD Sentaurus, AFM, SEM

ASIC Design Engineer

Freescale Semiconductor

2008-2009

  • RTL design of a Multi-Master Multi-Memory Interface IP core as part of the Memory Interface team. In charge of architecture and implementation according to ARM AXI standards and interfaced memories specifications.
  • Integrator of the entire Memory Interface module.
  • Planned and implemented verification, testing, and documentation requirements.
  • Skills: Verilog, Perl, Linux

ASIC Verification Engineer

Freescale Semiconductor

2006-2008

  • Brought up a System Verilog Assertion (SVA) verification environment for Multi-Master Multi-Memory Interface IP core, which uses the ARM AXI bus peripherals. Wrote checkers for module functionality, randomized configurations and inputs using constraints, created cover groups, and collected coverage.
  • Established the System Verilog Assertion work methodology at the company level in collaboration with the in-house software development team.
  • Skills: Verilog, Perl, Linux, SVA

FPGA Engineer

Communication Lab

Technion - Israel Institute of Technology

2004-2005

  • Implemented a GSM communication protocol using Xilinx FPGA design suite.
  • Skills: VHDL, C++, DSP

EDUCATION

Ph.D. Quantum Chemistry

Technion - Israel Institute of Technology, Israel, 2015

Thesis: ‘Modeling charge transport induced phenomena in colloidal double quantum dots and developing new probes for inter-dot interactions.’ 

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M.Sc. Materials Engineering and Nanotechnologies

Tel Aviv University, Israel, 2011

cum laude

Thesis: ‘Vertical Junction Silicon Cells for Concentrating Photovoltaics.’ 

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Download Thesis Slides

B.Sc. Electrical Engineering

Technion - Israel Institute of Technology, Israel, 2006

cum laude

Final Project: Designed a 2GHz digital sine wave generator using MATLAB and VHDL (RTL and high-level synthesis).

 

LANGUAGES AND TECHNOLOGIES

Languages and frameworks

JavaScript, TypeScript, Ruby on Rails, Node.js, Express.js, React, Angular

Technologies and tools

PostgreSQL, MongoDB, Apache Kafka, GraphQL, NetSuite, Git, Figma

Hardware design

Verilog, VHDL, Xilinx FPGA

Computational analysis

MATLAB, Python, Perl, Synopsys TCAD